PROGRAMANDO WISOL LOM204 COM STM32 IDE CUBE E PUBLICANDO DADOS NO SERVIDOR TTN

PROGRAMANDO WISOL LOM204 COM STM32 CUBE IDE E PUBLICANDO DADOS NO SERVIDOR TTN

IMPORTANTE: Opção NÃO OFICIAL da WISOL, indicamos uso do KEIL C

O objetivo deste BLOG é demonstrar como é possível programar o módulo WISOL LOM204A02 via STM32 CUBE IDE e assim utilizá-lo como OPENCPU (atualmente programado com o KEIL C). Foi baseado na library en.i-cube_lrwan_v2.1.0 e portado para o WISOL LOM204.

O exemplo abaixo esta configurado para CLASSE C, OTA.

IMPORTANTE: Opção NÃO OFICIAL da WISOL, indicamos uso do KEIL C

Foi utilizado o STM32 CUBE IDE para compilar o app END DEVICE.

Testado no STARTER KIT LOM204

Kit de avaliação para módulo LoRa Wisol LOM204A02 rede LoRaWAN e P2P - EVBLOM204A02 - SmartCore - one stop shop para fabricantes de soluções em IoT, rastreamento, telemetria e conectividade

Bem como em uma placa de testes

Sobre o I-CUBE-LRWAN:

• Integração de aplicativos pronta;

• Complemento fácil da solução lora® de baixa potência;

• Carga de CPU extremamente baixa;

• Sem requisitos de latência;

• Pouco uso de memória;

• Serviços de tempo de baixa potência.

IMPORTANTE: Opção NÃO OFICIAL da WISOL, indicamos uso do KEIL C

Baseado no link abaixo

How to Install STM32CubeIDE on Mac and STM32 LoRa Discovery Kit – E-Tinkers

Baixe e instale o STM32 CUBE IDE

STM32CubeIDE - Integrated Development Environment for STM32 - STMicroelectronics

Baixe e descompacte o github

clnrp/STM32CubeExpansion_LRWAN_V2.1.0_LOM204: STM32CubeExpansion_LRWAN_V2.1.0 for LOM204 radio (github.com)

(coloque (por exemplo) em C:\STM32CubeExpansion_LRWAN_V2.1.0_LOM204-master)

No STM32 CUBE IDE, faça a importação do Projeto

C:\STM32CubeExpansion_LRWAN_V2.1.0_LOM204-master\Projects\B-L072Z-LRWAN1\Applications\LoRaWAN\LoRaWAN_End_Node\STM32CubeIDE\cmwx1zzabz_0xx

Algumas alterações Básicas foram realizadas

Em lora_app.h

/* LoraWAN application configuration (Mw is configured by lorawan_conf.h) */

#define ACTIVE_REGION LORAMAC_REGION_AU915

Em lorawan_conf.h para

/* Region ------------------------------------*/

/* the region listed here will be linked in the MW code */

/* the application (on sys_conf.h) shall just configure one region at the time */

/*#define REGION_AS923*/

#define REGION_AU915

/*#define REGION_CN470*/

/*#define REGION_CN779*/

/*#define REGION_EU433*/

/*#define REGION_EU868*/

/*#define REGION_KR920*/

/*#define REGION_IN865*/

/*#define REGION_US915*/

/*#define REGION_RU864*/

Em se-identity.h

 ******************************************************************************
 ******************************************************************************
 ******************************************************************************
 */

/*!
 * When set to 1 DevEui is LORAWAN_DEVICE_EUI
 * When set to 0 DevEui is automatically set with a value provided by MCU platform
 */
#define STATIC_DEVICE_EUI                                  1

/*!
 * end-device IEEE EUI (big endian)
 */
#define LORAWAN_DEVICE_EUI                                 { 0x8X, 0x5X, 0x1X, 0xFX, 0xFX, 0xEX, 0x8X, 0x9X }

/*!
 * App/Join server IEEE EUI (big endian)
 */
#define LORAWAN_JOIN_EUI                                   { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }

/*!
 * When set to 1 DevAddr is LORAWAN_DEVICE_ADDRESS
 * When set to 0 DevAddr is automatically set with a value provided by a pseudo
 *      random generator seeded with a value provided by the MCU platform
 */
#define STATIC_DEVICE_ADDRESS                              1

/*!
 * Device address on the network (big endian)
 */
#define LORAWAN_DEVICE_ADDRESS                             ( uint32_t )0x01E0002A

/*!
 * Application root key
 */
#define LORAWAN_APP_KEY                                    97,4A,BB,55,8A,25,01,94,A6,CB,C2,16,E2,AB,2E,5B

/*!
 * Network root key
 */
#define LORAWAN_NWK_KEY                                    97,4A,BB,55,8A,25,01,94,A6,CB,C2,16,E2,AB,2E,5B

/*!
 * Forwarding Network session key
 */
#define LORAWAN_NWK_S_KEY                                  2B,7E,15,16,28,AE,D2,A6,AB,F7,15,88,09,CF,4F,3C

/*!
 * Application session key
 */
#define LORAWAN_APP_S_KEY                                  2B,7E,15,16,28,AE,D2,A6,AB,F7,15,88,09,CF,4F,3C

Em cmwx1zzabz_0xx_conf.h (pinos do LOM204 (Radio SX1276))

/**
  ******************************************************************************
  * @file              : cmwx1zzabz_0xx_conf.h
  * @brief             : This file provides code for the configuration
  *                      of the shield instances (pin mapping).
  ******************************************************************************
  * @attention
  *
  * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
  * All rights reserved.</center></h2>
  *
  * This software component is licensed by ST under Ultimate Liberty license
  * SLA0044, the "License"; You may not use this file except in compliance with
  * the License. You may obtain a copy of the License at:
  *                             www.st.com/SLA0044
  *
  ******************************************************************************
  */

#ifndef __CMWX1ZZABZ_0XX_CONF_H__
#define __CMWX1ZZABZ_0XX_CONF_H__

#ifdef __cplusplus
extern "C" {
#endif

#include "platform.h"
#include "radio_conf.h"

/* Defines ---------------------------------------------------------------*/
#define RADIO_DIO_0_IT_PRIO                        0
#define RADIO_DIO_1_IT_PRIO                        0
#define RADIO_DIO_2_IT_PRIO                        0
#define RADIO_DIO_3_IT_PRIO                        0

/* Daughter board Pin mapping --------------------------------------------*/

/*  SPI functions redefinition */
#define RADIO_SPI_Init                   BSP_SPI1_Init
#define RADIO_SPI_DeInit                 BSP_SPI1_DeInit
#define RADIO_SPI_SendRecv               BSP_SPI1_SendRecv

#define RADIO_SPI_SCK_GPIO_PIN           BUS_SPI1_SCK_GPIO_PIN
#define RADIO_SPI_MISO_GPIO_PIN          BUS_SPI1_MISO_GPIO_PIN
#define RADIO_SPI_MOSI_GPIO_PIN          BUS_SPI1_MOSI_GPIO_PIN
#define RADIO_SPI_SCK_GPIO_PORT          BUS_SPI1_SCK_GPIO_PORT
#define RADIO_SPI_MISO_GPIO_PORT         BUS_SPI1_MISO_GPIO_PORT
#define RADIO_SPI_MOSI_GPIO_PORT         BUS_SPI1_MOSI_GPIO_PORT
#define RADIO_SPI_SCK_GPIO_AF            BUS_SPI1_SCK_GPIO_AF
#define RADIO_SPI_MOSI_GPIO_AF           BUS_SPI1_MOSI_GPIO_AF
#define RADIO_SPI_MISO_GPIO_AF           BUS_SPI1_MISO_GPIO_AF
#define RADIO_SPI_SCK_GPIO_CLK_ENABLE()  BUS_SPI1_SCK_GPIO_CLK_ENABLE()
#define RADIO_SPI_MOSI_GPIO_CLK_ENABLE() BUS_SPI1_MOSI_GPIO_CLK_ENABLE()
#define RADIO_SPI_MISO_GPIO_CLK_ENABLE() BUS_SPI1_MISO_GPIO_CLK_ENABLE()

/* SPIx Bus Pin mapping */
#define RADIO_NSS_CLK_ENABLE()      __HAL_RCC_GPIOA_CLK_ENABLE()
#define RADIO_NSS_PORT              GPIOA
#define RADIO_NSS_PIN               GPIO_PIN_4

/* LORA I/O pin mapping */
#define RADIO_RESET_CLK_ENABLE()    __HAL_RCC_GPIOA_CLK_ENABLE()
#define RADIO_RESET_PORT            GPIOA
#define RADIO_RESET_PIN             GPIO_PIN_8

#define RADIO_DIOn                               4U

#define RADIO_DIO_0_PORT                  GPIOA
#define RADIO_DIO_0_PIN                   GPIO_PIN_12
#define RADIO_DIO_0_GPIO_CLK_ENABLE()     __HAL_RCC_GPIOA_CLK_ENABLE()
#define RADIO_DIO_0_EXTI_LINE             EXTI_LINE_12
#define RADIO_DIO_0_IRQn                  EXTI4_15_IRQn
#define H_EXTI_12        hRADIO_DIO_exti[0]

#define RADIO_DIO_1_PORT                  GPIOB
#define RADIO_DIO_1_PIN                   GPIO_PIN_2
#define RADIO_DIO_1_GPIO_CLK_ENABLE()     __HAL_RCC_GPIOB_CLK_ENABLE()
#define RADIO_DIO_1_EXTI_LINE             EXTI_LINE_2
#define RADIO_DIO_1_IRQn                  EXTI2_3_IRQn
#define H_EXTI_2        hRADIO_DIO_exti[1]

#define RADIO_DIO_2_PORT        GPIOB
#define RADIO_DIO_2_PIN         GPIO_PIN_5
#define RADIO_DIO_2_GPIO_CLK_ENABLE()     __HAL_RCC_GPIOB_CLK_ENABLE()
#define RADIO_DIO_2_EXTI_LINE             EXTI_LINE_5
#define RADIO_DIO_2_IRQn                  EXTI4_15_IRQn
#define H_EXTI_5        hRADIO_DIO_exti[2]

#define RADIO_DIO_3_PORT        GPIOB
#define RADIO_DIO_3_PIN         GPIO_PIN_0
#define RADIO_DIO_3_GPIO_CLK_ENABLE()     __HAL_RCC_GPIOB_CLK_ENABLE()
#define RADIO_DIO_3_EXTI_LINE             EXTI_LINE_0
#define RADIO_DIO_3_IRQn                  EXTI0_1_IRQn
#define H_EXTI_0        hRADIO_DIO_exti[3]

#define RADIO_TCXO_VCC_CLK_ENABLE()      __HAL_RCC_GPIOB_CLK_ENABLE()
#define RADIO_TCXO_VCC_PORT       GPIOB
#define RADIO_TCXO_VCC_PIN        GPIO_PIN_1

#define RADIO_ANT_SWITCH_CLK_ENABLE_RX()      __HAL_RCC_GPIOA_CLK_ENABLE()
#define RADIO_ANT_SWITCH_PORT_RX       GPIOA
#define RADIO_ANT_SWITCH_PIN_RX        GPIO_PIN_15

#define RADIO_ANT_SWITCH_CLK_ENABLE_TX_BOOST()      __HAL_RCC_GPIOC_CLK_ENABLE()
#define RADIO_ANT_SWITCH_PORT_TX_BOOST       GPIOC
#define RADIO_ANT_SWITCH_PIN_TX_BOOST        GPIO_PIN_1

#define RADIO_ANT_SWITCH_CLK_ENABLE_TX_RFO()      __HAL_RCC_GPIOC_CLK_ENABLE()
#define RADIO_ANT_SWITCH_PORT_TX_RFO       GPIOC
#define RADIO_ANT_SWITCH_PIN_TX_RFO        GPIO_PIN_2

#ifdef __cplusplus
}
#endif
#endif /* __CMWX1ZZABZ_0XX_CONF_H__ */

/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

Em RegionAU915.c, a máscara utilizada para compatibilizar com configuração utilizada no Gateway LoRaWAN

// Initialize channels default mask
            /* ST_WORKAROUND_BEGIN: Hybrid mode */
#if ( HYBRID_ENABLED == 1 )
            RegionNvmGroup2->ChannelsDefaultMask[0] = 0x00FF;
            RegionNvmGroup2->ChannelsDefaultMask[1] = 0x0000;
            RegionNvmGroup2->ChannelsDefaultMask[2] = 0x0000;
            RegionNvmGroup2->ChannelsDefaultMask[3] = 0x0000;
            RegionNvmGroup2->ChannelsDefaultMask[4] = 0x0001;
            RegionNvmGroup2->ChannelsDefaultMask[5] = 0x0000;
#else
            RegionNvmGroup2->ChannelsDefaultMask[0] = 0xFF00;
            RegionNvmGroup2->ChannelsDefaultMask[1] = 0x0000;
            RegionNvmGroup2->ChannelsDefaultMask[2] = 0x0000;
            RegionNvmGroup2->ChannelsDefaultMask[3] = 0x0000;
            RegionNvmGroup2->ChannelsDefaultMask[4] = 0x0000;
            RegionNvmGroup2->ChannelsDefaultMask[5] = 0x0000;

SmartCore - LoRa Wisol - All Documents (sharepoint.com)

Carta de Apresentação

em stm32l0xx_it.c

/* USER CODE BEGIN Header */
/**
  ******************************************************************************
  * @file    stm32l0xx_it.c
  * @brief   Interrupt Service Routines.
  ******************************************************************************
  * @attention
  *
  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
  * All rights reserved.</center></h2>
  *
  * This software component is licensed by ST under Ultimate Liberty license
  * SLA0044, the "License"; You may not use this file except in compliance with
  * the License. You may obtain a copy of the License at:
  *                             www.st.com/SLA0044
  *
  ******************************************************************************
  */
/* USER CODE END Header */

/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32l0xx_it.h"
#include "radio_board_if.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */

/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */

/* USER CODE END TD */

/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */

/* USER CODE END PD */

/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */

/* USER CODE END PM */

/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */

/* USER CODE END PV */

/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */

/* USER CODE END PFP */

/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */

/* USER CODE END 0 */

/* External variables --------------------------------------------------------*/
extern DMA_HandleTypeDef hdma_lpuart1_tx;
extern UART_HandleTypeDef hlpuart1;
extern RTC_HandleTypeDef hrtc;
/* USER CODE BEGIN EV */

/* USER CODE END EV */

/******************************************************************************/
/*           Cortex Processor Interruption and Exception Handlers          */
/******************************************************************************/
/**
  * @brief This function handles Non maskable interrupt.
  */
void NMI_Handler(void)
{
  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */

  /* USER CODE END NonMaskableInt_IRQn 0 */
  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
  while (1)
  {
  }
  /* USER CODE END NonMaskableInt_IRQn 1 */
}

/**
  * @brief This function handles Hard fault interrupt.
  */
void HardFault_Handler(void)
{
  /* USER CODE BEGIN HardFault_IRQn 0 */

  /* USER CODE END HardFault_IRQn 0 */
  while (1)
  {
    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
    /* USER CODE END W1_HardFault_IRQn 0 */
  }
}

/**
  * @brief This function handles Memory management fault.
  */
void MemManage_Handler(void)
{
  /* USER CODE BEGIN MemoryManagement_IRQn 0 */

  /* USER CODE END MemoryManagement_IRQn 0 */
  while (1)
  {
    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
    /* USER CODE END W1_MemoryManagement_IRQn 0 */
  }
}

/**
  * @brief This function handles Prefetch fault, memory access fault.
  */
void BusFault_Handler(void)
{
  /* USER CODE BEGIN BusFault_IRQn 0 */

  /* USER CODE END BusFault_IRQn 0 */
  while (1)
  {
    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
    /* USER CODE END W1_BusFault_IRQn 0 */
  }
}

/**
  * @brief This function handles Undefined instruction or illegal state.
  */
void UsageFault_Handler(void)
{
  /* USER CODE BEGIN UsageFault_IRQn 0 */

  /* USER CODE END UsageFault_IRQn 0 */
  while (1)
  {
    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
    /* USER CODE END W1_UsageFault_IRQn 0 */
  }
}

/**
  * @brief This function handles System service call via SWI instruction.
  */
void SVC_Handler(void)
{
  /* USER CODE BEGIN SVCall_IRQn 0 */

  /* USER CODE END SVCall_IRQn 0 */
  /* USER CODE BEGIN SVCall_IRQn 1 */

  /* USER CODE END SVCall_IRQn 1 */
}

/**
  * @brief This function handles Debug monitor.
  */
void DebugMon_Handler(void)
{
  /* USER CODE BEGIN DebugMonitor_IRQn 0 */

  /* USER CODE END DebugMonitor_IRQn 0 */
  /* USER CODE BEGIN DebugMonitor_IRQn 1 */

  /* USER CODE END DebugMonitor_IRQn 1 */
}

/**
  * @brief This function handles Pendable request for system service.
  */
void PendSV_Handler(void)
{
  /* USER CODE BEGIN PendSV_IRQn 0 */

  /* USER CODE END PendSV_IRQn 0 */
  /* USER CODE BEGIN PendSV_IRQn 1 */

  /* USER CODE END PendSV_IRQn 1 */
}

/**
  * @brief This function handles System tick timer.
  */
void SysTick_Handler(void)
{
  /* USER CODE BEGIN SysTick_IRQn 0 */

  /* USER CODE END SysTick_IRQn 0 */
  HAL_IncTick();
  /* USER CODE BEGIN SysTick_IRQn 1 */

  /* USER CODE END SysTick_IRQn 1 */
}

/******************************************************************************/
/* STM32L0xx Peripheral Interrupt Handlers                                    */
/* Add here the Interrupt Handlers for the used peripherals.                  */
/* For the available peripheral interrupt handler names,                      */
/* please refer to the startup file (startup_stm32l0xx.s).                    */
/******************************************************************************/

/**
  * @brief  This function handles PPP interrupt request.
  * @param  None
  * @retval None
  */
/*void PPP_IRQHandler(void)
{
}*/

void EXTI0_1_IRQHandler(void)
{
#if (defined(CMWX1ZZABZ0XX))
  HAL_EXTI_IRQHandler(&H_EXTI_0);
#endif
}

void EXTI2_3_IRQHandler(void)
{
  HAL_EXTI_IRQHandler(&H_EXTI_2);
#if (defined(CMWX1ZZABZ0XX))
  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_2);
#endif
#if (defined(SX1276MB1MAS) | defined(SX1276MB1LAS) | defined(SX1272MB2DAS))
  HAL_EXTI_IRQHandler(&H_EXTI_3);
#endif
}

void EXTI4_15_IRQHandler(void)
{
  HAL_EXTI_IRQHandler(&H_EXTI_12);
  HAL_EXTI_IRQHandler(&H_EXTI_5);
#if (defined(SX1276MB1MAS) | defined(SX1276MB1LAS) | defined(SX1272MB2DAS))
  HAL_EXTI_IRQHandler(&H_EXTI_5);
#endif

#if (defined(SX1276MB1MAS) | defined(SX1276MB1LAS) | defined(SX1272MB2DAS))
  HAL_EXTI_IRQHandler(&H_EXTI_10);
#endif

#if (defined(CMWX1ZZABZ0XX))
  //HAL_EXTI_IRQHandler(&H_EXTI_13);
#else
  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_13);
#endif
}

void DMA1_Channel4_5_6_7_IRQHandler(void)
{
  /* USER CODE BEGIN DMA1_Channel4_5_6_7_IRQn 0 */

  /* USER CODE END DMA1_Channel4_5_6_7_IRQn 0 */
  HAL_DMA_IRQHandler(&hdma_lpuart1_tx);
  /* USER CODE BEGIN DMA1_Channel4_5_6_7_IRQn 1 */

  /* USER CODE END DMA1_Channel4_5_6_7_IRQn 1 */
}

/**
  * @brief This function handles LPUART1 Interrupt.
  */
void LPUART1_IRQHandler(void)
{
  /* USER CODE BEGIN LPUART1_IRQn 0 */

  /* USER CODE END LPUART1_IRQn 0 */
  HAL_UART_IRQHandler(&hlpuart1);
  /* USER CODE BEGIN LPUART1_IRQn 1 */

  /* USER CODE END LPUART1_IRQn 1 */
}

void RTC_IRQHandler(void)
{
  /* USER CODE BEGIN RTC_Alarm_IRQn 0 */

  /* USER CODE END RTC_Alarm_IRQn 0 */
  HAL_RTC_AlarmIRQHandler(&hrtc);
  /* USER CODE BEGIN RTC_Alarm_IRQn 1 */

  /* USER CODE END RTC_Alarm_IRQn 1 */
}

/* USER CODE BEGIN 1 */

/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

Compilando

Na pasta

C:\Users\Usuario\Desktop\STM32CubeExpansion_LRWAN_V2.1.0\Projects\B-L072Z-LRWAN1\Applications\LoRaWAN\LoRaWAN_End_Node\STM32CubeIDE\cmwx1zzabz_0xx\Debug

será gerado um arquivo cmwx1zzabz_0xx.elf

Abra o STM32 CUBE Programmer e faça a gravação!